Table Of Contents
IEEE Electron Device Letters publication information, Page(s): C2-C2
What Is in a Page Charge? Jindal, R. P. , Page(s): 535-535
Sb-Heterostructure Millimeter-Wave Detectors With Reduced Capacitance and Noise Equivalent Power
Su, N.; Rajavel, R.; Deelman, P.; Schulman, J. N.; Fay, P. , Page(s): 536-539
A Novel SR Latch Device Realized by Integration of Three-Terminal Ballistic Junctions in InGaAs/InP
Sun, J.; Wallin, D.; Maximov, I.; Xu, H. Q. , Page(s): 540-542
Enhancement and Depletion Mode AlGaN/GaN CAVET With Mg-Ion-Implanted GaN as Current Blocking Layer Chowdhury, S.; Swenson, B.; Mishra, U. K. , Page(s): 543-545
Emitter-Size Effects and Ultimate Scalability of InP:GaInP/GaAsSb/InP DHBTs
Liu, H. G.; Ostinelli, O.; Zeng, Y. P.; Bolognesi, C. R. , Page(s): 546-548
Short Channel Characteristics of Gallium–Indium–Zinc–Oxide Thin Film Transistors for Three-Dimensional Stacking Memory Song, I.; Kim, S.; Yin, H.; Kim, C. J.; Park, J.; Choi, H. S.; Lee, E.; Page(s): 549-552
In Situ Surface Passivation and CMOS-Compatible Palladium–Germanium Contacts for Surface-Channel Gallium Arsenide MOSF Chin, H.-C.; Zhu, M.; Tung, C.-H.; Samudra, G. S.; Yeo, Y.-C. , Page(s): 553-556
Fabrication of Self-Aligned Enhancement-Mode $ hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ MOSFETs With Gate Stack Shahrjerdi, D.; Rotter, T.; Balakrishnan, G.; Huffaker, D.; Tutuc, E.; Page(s): 557-560
Metamorphic AlInAs/GaInAs HEMTs on GaAs Substrates by MOCVD
Li, H.; Tang, C. W.; Lau, K. M. , Page(s): 561-564
Effects of In Situ $hbox{O}_{2}$ Plasma Treatment on off-State Leakage and Reliability in Metal-Gate/High- $k$ Dielectric MOSFETs Lee, K. T.; Kang, C. Y.; Ju, B. S.; Page(s): 565-567
Voltage-Controlled Relaxation Oscillations in Phase-Change Memory Devices
Ielmini, D.; Mantegazza, D.; Lacaita, A. L. , Page(s): 568-570
Electronic Properties and Junction Behavior of Polyanthranilic Acid/Metal Contacts
Singh, A. K.; Prakash, R.; Dwivedi, A; Chakrabarti, P , Page(s): 571-574
White Light Emission From DBPPV and CdSe/ZnS Quantum Dots Dually Hybridized on InGaN Light-Emitting Diodes Su, Y.-K.; Tsai, P.-C.; Huang, C.-Y.; Chen, Y.-C. , Page(s): 575-577
Extensive Analysis of the Degradation of Blu-Ray Laser Diodes
Meneghini, M.; Meneghesso, G.; Trivellin, N.; Zanoni, E.; Orita, K.;Page(s): 578-581
High-Efficiency GaN-Based Light-Emitting Diodes Fabricated With Metallic Hybrid Reflectors
Kim, H.; Lee, S.-N.; Park, Y.; Seong, T.-Y. , Page(s): 582-584
A Radiation Imaging Detector Made by Postprocessing a Standard CMOS Chip
Blanco Carballo, V. M.; Chefdeville, M.; Fransen, M.; van der Graaf, H , Page(s): 585-587
Improving Switching Performance of Thin-Film Transistors in Disordered Silicon
Guo, X.; Ishii, T.; Silva, S. R. P. , Page(s): 588-591
High-Performance Metal-Induced Laterally Crystallized Polycrystalline Silicon P-Channel Thin-Film Transistor Gate Stack Structure Ma, M.-W.; Chao, T.-S.; Su, C.-J.; Wu, W.-C.; Page(s): 592-594
Ge-Rich (70%) SiGe Nanowire MOSFET Fabricated Using Pattern-Dependent Ge-Condensation Technique
Jiang, Y.; Singh, N.; Liow, T. Y.; Loh, W. Y.; Balakumar, S.; Hoe, K. M.; Tung, C. , Page(s): 595-598
Strain-Engineered Si/SiGe Resonant Interband Tunneling Diodes Grown on Virtual Substrates With Strained Si Cladding Layers Jin, N.; Yu, R.; Chung, S.-Y.; Berger, P. R.; ThompsPage(s): 599-602
Passivation Effect of Poly-Si Thin-Film Transistors With Fluorine-Ion-Implanted Spacers
Chen, W.-R.; Chang, T.-C.; Liu, P.-T.; Wu, C.-J.; Tu, C.-H.;Page(s): 603-605
Complementary Antiparallel Schottky Barrier Diode Pair in a 0.13- $mu hbox{m}$ Logic CMOS Technology
Shim, D.; Sankaran, S.; O, K. K. , Page(s): 606-608
Quantitative Evaluation of Statistical Variability Sources in a 45-nm Technological Node LP N-MOSFET
Cathignol, A.; Cheng, B.; Chanemougame, D.; Brown, A. R.; Rochereau, K.; Page(s): 609-611
Breakdown Behavior of 40-nm PD-SOI NMOS Device Considering STI-Induced Mechanical Stress Effect
Su, V. C.; Lin, I. S.; Kuo, J. B.; Lin, G. S.; Chen, D.; Yeh, C. S.; Tsai, C. T.; Ma, M. , Page(s): 612-614
A Nanoscale Vertical Double-Gate Single-Transistor Capacitorless DRAM
Ertosun, M. G.; Cho, H.; Kapur, P.; Saraswat, K. C. , Page(s): 615-617
A Ta/Mo Interdiffusion Dual Metal Gate Technology for Drivability Enhancement of FinFETs
Matsukawa, T.; Endo, K.; Liu, Y.; O'uchi, S.; Ishikawa, Y.; Yamauchi,Sakamoto, K.; Suzuki, E. , Page(s): 618-620
Is SOD Technology the Solution to Heating Problems in SOI Devices?
Raleva, K.; Vasileska, D.; Goodnick, S. M. , Page(s): 621-624
A 60-GHz Millimeter-Wave CPW-Fed Yagi Antenna Fabricated by Using 0.18- $muhbox{m}$ CMOS Technology Hsu, S.-S.; Wei, K.-C.; Hsu, C.-Y.; Ru-Chuang, H. , Page(s): 625-627
The Quantization Impact of Accumulated Carriers in Silicide-Gated MOSFETs
Rodriguez, N.; Gamiz, F.; Clerc, R.; Ghibaudo, G.; Cristoloveanu, S. , Page(s): 628-631
A Bulk FinFET Unified-RAM (URAM) Cell for Multifunctioning NVM and Capacitorless 1T-DRAM
Han, J.-W.; Ryu, S.-W.; Kim, S.; Kim, C.-J.; Ahn, J.-H.; Choi, S.-J.; Kim, Page(s): 632-634
High-$kappa$ and Metal-Gate pMOSFETs on GeOI Obtained by Ge Enrichment: Analysis of ON and OFF Performances Le Royer, C.; Vincent, B.; Clavelier, L.; Damlencourt, J.-F.; Page(s): 635-637
Assessing Alpha Particle-Induced Single Event Transient Vulnerability in a 90-nm CMOS Technology
Gadlage, M. J.; Schrimpf, R. D.; Narasimham, B.; Pellish, J. A.; Warren, K. Page(s): 638-640
Combining a Novel Charge-Based Capacitance Measurement (CBCM) Technique and Split $C$–$V$ Method to Specifically Chang, Y.-W.; Chang, H.-W.; Lu, T.-C.; King, Y.-C.; ChePage(s): 641-644
A Novel 1200-V LDMOSFET with Floating Buried Layer in Substrate
Cheng, J.; Zhang, B.; Li, Z. , Page(s): 645-647
IEEE Electron Devices Society Meetings Calendar for 2008 (As of 5 May 2008)
Page(s): 648-649
 IEEE Electron Device Letters information for authors
Page(s): 650-650
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