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IEEE Design and Test of Computers July-August 2008 (Vol. 25, No. 4)  ISSN: 0740-7475

Table Of Contents

Cover Page1

Cover Page 2

Cover Page 3

Cover Page 4

Not just research as usual  Tim Cheng p. 292

Guest Editors' Introduction: System IC Design Challenges beyond 32 nm William H. Joyner Jr., Semiconductor Research Corp.pp. 294-295

Challenges and Solutions for Late- and Post-Silicon Design
Jan M. Rabaey, University of California, Berkeley pp. 296-302

Interview: A Discussion with Intel Chair Craig Barrett  pp. 304-311

The Concurrency Challenge Wen-mei Hwu, University of Illinois at  pp. 312-320

The GSRC: Bridging Academia and Industry  Richard Oehler, AMD p. 321

Reliable Systems on Unreliable Fabrics Todd Austin,  pp. 322-332

The Changing Design Landscape  Ajith Amerasekera,  p. 333

The Search for Alternative Computational Paradigms Naresh R. Shanbhag,  pp. 334-343

Variability and New Design Paradigms Leon Stok, IBM p. 344

Is a Unified Methodology for System-Level Design Possible? Alberto Sangiovanni-Vincentelli,  pp. 346-357

Workloads of the Future Jan M. Rabaey,  pp. 358-365

The GSRC's Role in Meeting Tomorrow's Design Challenges John C. Zolper, Raytheon Company pp. 366-367

A Digital-Microfluidic Approach to Chip Cooling Philip Y. Paik,  pp. 372-381

With pick and shovel through our data  Scott Davidson, Sun Microsystemspp. 382-383

DATC Newsletter  Joe Damorep. 384

CEDA Currents  pp. 386-388

TTTC Newsletter Bruce C. Kimpp. 390-391

Who knew this "experiment" would be so successful?       Betsy Weitzman, Semiconductor Research Corp.p. 392