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IEEE Design and Test of Computers January-February 2008 (Vol. 25, No. 1)   ISSN: 0740-7475

Table Of Contents

From the EIC
From the EIC ,Tim Cheng,p. 4
Special Issue Features
Guest Editors' Introduction: The Evolution of RFIC Design and Test  , Bruce C. pp. 6-8

Design and Analysis of a Transversal Filter RFIC in SiGe Technology ,
Vasanth Kakani, pp. 10-16

Design of a Low-Noise UWB Transceiver SiP  Changwook Yoon, pp. 18-28

Decreasing Test Qualification Time in AMS and RF Systems  Yves Joannon, pp. 29-37

Light-Enhanced FET Switch Improves ATE RF Power Settling  Joe Kelly, Verigypp. 38-43
Other Features
Time-Division-Multiplexed Test Delivery for NoC Systems  John Mark Nolen, pp. 44-51

Low-Impact Processor for Dynamic Runtime Power Management  Jorgen Peddersen, pp. 52-62

Hybrid-SBST Methodology for Efficient Testing of Processor Cores
Nektarios Kranitis ,pp. 64-75

Simultaneous Switching Noise: The Relation between Bus Layout and Coding
Daniele Rossi,  p. 76-86

In Conversation with Tensilica CEO Chris Rowen ,pp. 88-95

Book Reviews
How to make your own processor architecture  cott Davidson, pp. 96-98

CEDA Currents
CEDA Currents ,pp. 100-101
DATC Newsletter
DATC Newsletter  Joe Damorep. 102
TTTC Newsletter
The Last Byte
Changing times in the RF world ,Bill Krenik, Texas Instruments ,p. 104