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IEEE Transaction on Electron Devices Volume: 55  Issue: 5   Date: May 2008

Table of Contents

IEEE Transactions on Electron Devices publication information ,Page(s): C2-C2

Power Density and Efficiency of Thermophotovoltaic Energy Conversion Using a Photonic-Crystal Emitter and a $hbox{2}$ -D Metal-Grid Filter ,Walsh, T. A.; Lin, S.-Y.Page(s): 1101-1108

A Comparison of the Performance and Stability of ZnO-TFTs With Silicon Dioxide and Nitride as Gate Insulators
Cross, R. B. M.; De Souza, M. M.; Deane, S. C.; Young, N. D.Page(s): 1109-1115

Band-Structure Effects on the Performance of III–V Ultrathin-Body SOI MOSFETs
Liu, Y.; Neophytou, N.; Klimeck, G.; Lundstrom, M. S.Page(s): 1116-1122

A Method for Current Spreading Analysis and Electrode Pattern Design in Light-Emitting Diodes ,Hwang, S.; Shim, J.Page(s): 1123-

New Sustain Waveform for Improving Luminous Efficiency in Wide-Gap Plasma-Display Panel
Kim, H.; Tae, H-.S.Page(s): 1129-1136

Anomalous Hot-Carrier-Induced Increase in Saturation-Region Drain Current in n-Type Lateral Diffused Metal–Oxide–Semiconductor Transistors ,Chen, S.-Y.; Chen, J. F.; Lee, J. R.; Wu, K.-M.; Liu, C. M.; Hsu, S. L.Page(s): 1137-1142

Optimization of Gate Leakage and NBTI for Plasma-Nitrided Gate Oxides by Numerical and Analytical Models
Islam, A. E.; Gupta, G.; Ahmed, K. Z.; Mahapatra, S.; Alam, M. A.Page(s): 1143-1152

Reliability Mechanisms of LTPS-TFT With $hbox{HfO}_{2}$ Gate Dielectric: PBTI, NBTI, and Hot-Carrier Stress
Ma, M.-W.; Chen, C.-Y.; Wu, W.-C.; Su, C.-J.; Kao, K.-H.; Chao, T.-S.; Lei, T.-F.Page(s): 1153-1160

Optimal Dual-$V_{T}$ Design in Sub-100-nm PD/SOI and Double-Gate Technologies
Bansal, A.; Kim, J.-J.; Kim, K.; Mukhopadhyay, S.; Chuang, C.-T.; Roy, K.Page(s): 1161-1169

Evaluation of Transmission Line Model Structures for Silicide-to-Silicon Specific Contact Resistance Extraction
Stavitski, N.; van Dal, M. J. H.; Lauwers, A.; Vrancken, C.; Kovalgin, A. Y.; Wolters, R. A. M.Page(s): 1170-1176

Analysis of the Effects of Fringing Electric Field on FinFET Device Performance and Structural Optimization Using 3-D Simulation
Zhao, H.; Yeo, Y.-C.; Rustagi, S. C.; Samudra, G. S.Page(s): 1177-1184

Sub-$hbox{100-}muhbox{A}$ Reset Current of Nickel Oxide Resistive Memory Through Control of Filamentary Conductance by Current Limit of MOSFET Sato, Y.; Tsunoda, K.; Kinoshita, K.; Noshiro, H.; Aoki, M.; Sugiyama, Y.Page(s): 1185-1191

RF Small-Signal Analysis of Schottky-Barrier p-MOSFET
Valentin, R.; Dubois, E.; Raskin, J.-P.; Larrieu, G.; Dambrine, G.; Lim, T. C.; Breil, N.; Danneville, F.Page(s): 1192-1202

Investigation of Thermal Noise in UTB GOI and SOI Devices ,Pei, Y.; Huang, R.; An, X.; Zhuge, J.; Li, X Page(s): 1203-1210

Experimental Characterization of the Vertical Position of the Trapped Charge in Si Nitride-Based Nonvolatile Memory Cells
Arreghini, A.; Driussi, F.; Vianello, E.; Esseni, D.; van Duuren, M. J.; Golubovic, D. S.; Akil, N.; van Schaijk, R.Page(s): 1211-1219

Charge Collection From Within a Collecting Junction Well ,Kurniawan, O.; Ong, V. K. S.Page(s): 1220-1228

Lateral Current Confinement Determines Silicon Avalanche Transistor Operation in Short-Pulsing Mode
Duan, G.; Vainshtein, S. N.; Kostamovaara, J. T.Page(s): 1229-1236

Thin-Film Bulk-Acoustic-Resonator Gas Sensor Functionalized With a Nanocomposite Langmuir–Blodgett Layer of Carbon Nanotubes Penza, M.; Aversa, P.; Cassano, G.; Suriano, D.; Wlodarski, W.; Benetti, M.; CannatÀCannata, Page(s): 1237-1243

(111)-Faceted Metal Source and Drain for Aggressively Scaled Metal/High- $k$ MISFETs
Mise, N.; Migita, S.; Watanabe, Y.; Satake, H.; Nabatame, T.; Toriumi, A.Page(s): 1244-1249

A New Method to Extract Bulk Carrier Mobility in Germanium-on-Insulator ,Jin, H.-Y.; Cheung, N. W.Page(s): 1250-1254

A Model With Temperature-Dependent Exponent for Hot-Carrier Injection in High-Voltage nMOSFETs Involving Hot-Hole Injection and Dispersion ,\Dai, M.; Gao, C.; Yap, K.; Shan, Y.; Cao, Z.; Liao, K.; Wang, L.; Cheng, B.; Liu, S.Page(s): 1255-1258

Manufacturable Processes for $leq$ 32-nm-node CMOS Enhancement by Synchronous Optimization of Strain-Engineered Channel and External Parasitic Resistances ,Noori, A. 1259-1264

A Parabolic Potential Barrier-Oriented Compact Model for the $k_{B}T$ Layer's Width in Nano-MOSFETs
Chen, M.-J.; Lu, L.-F. Page(s): 1265-1268

Thermal Analysis of a Helix TWT Slow-Wave Structure ,Han, Y.; Liu, Y.-W.; Ding, Y.-G.; Liu, P.-K.; Lu, C.-H.Page(s): 1269-1272

IEEE Transactions on Electron Devices information for authors ,Page(s): C3-C3