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IEEE Transactions on Circuits and Systems PartI —Volume: 55  Issue: 7   Date: . 2008

Table of Contents

IEEE Transactions on Circuits and Systems—I: Regular Papers publication information
Page(s): C2-C2

Wideband CMOS Amplifier Design: Time-Domain Considerations
Walling, J.S.; Shekhar, S.; Allstot, D.J. Page(s): 1781-1793

A Current Injection Built-In Test Technique for RF Low-Noise Amplifiers
Xiaohua Fan; Onabajo, M.; Fernandez-Rodriguez, F.O.; Silva-Martinez, J.; Sanchez-Sinencio, E.
Page(s): 1794-1804

A Fully Integrated Variable-Gain Multi-tanh Low-Noise Amplifier for Tunable FM Radio Receiver Front-End
Jingyu Hu; May, M.; Felder, M.; Ragan, L. Page(s): 1805-1814

Ultra-Low-Noise High-Input Impedance Amplifier for Low-Frequency Measurement Applications
Levinzon, F.A. Page(s): 1815-1822

Sub-Integer Frequency Synthesis Using Phase-Rotating Frequency Dividers
Floyd, B.A. Page(s): 1823-1833

Systematic Design of Supply Regulated LC-Tank Voltage-Controlled Oscillators
Xuejin Wang; Bakkaloglu, B. Page(s): 1834-1844

A Fully Integrated Spread-Spectrum Clock Generator by Using Direct VCO Modulation
Yi-Bin Hsieh; Yao-Huang Kao Page(s): 1845-1853

Advanced Low-Noise X-Ray Readout ASIC for Radiation Sensor Interfaces
Noulis, T.; Siskos, S.; Sarrabayrouse, G.; Bary, L. Page(s): 1854-1862

A Charge-Based Low-Power High-SNR Capacitive Sensing Interface Circuit
Sheng-Yu Peng; Qureshi, M.S.; Hasler, P.E.; Basu, A.; Degertekin, F.L. Page(s): 1863-1872

An On-Line Calibration Technique for Mismatch Errors in High-Speed DACs
Catteau, B.; Rombouts, P.; Raman, J.; Weyten, L. Page(s): 1873-1883

Embedded Measurement of GHz Digital Signals With Time Amplification in CMOS
Safi-Harb, M.; Roberts, G.W. Page(s): 1884-1896

Synthesis of a Passive Complex Filter Using Transformers
Shouno, K.; Ishibashi, Y. Page(s): 1897-1903

Skewed Repeater Bus: A Low-Power Scheme for On-Chip Buses
Ghoneima, M.M.; Khellah, M.M.; Tschanz, J.; Yibin Ye; Kurd, N.; Barkatullah, J.S.; Nimmagadda, S.; Ismail, Y.; De, V.K. Page(s): 1904-1910

Inter-Wire Coupling Reduction Analysis of Bus-Invert Coding
Rung-Bin Lin Page(s): 1911-1920

A Modified IBIS Model Aimed at Signal Integrity Analysis of Systems in Package
Pulici, P.; Girardi, A.; Vanalli, G. P.; Izzi, R.; Bernardi, G.; Ripamonti, G.; Strollo, A. G. M.; Campardo, G.
Page(s): 1921-1928

An Area Efficient Early ${Z}$ -Test Method for 3-D Graphics Rendering Hardware
Chang-Hyo Yu; Donghyun Kim; Lee-Sup Kim Page(s): 1929-1938

A Systematic Approach for Synthesizing VLSI Architectures of Lifting-Based Filter Banks and Transforms
Bartholoma, R.; Greiner, T.; Kesel, F.; Rosenstiel, W. Page(s): 1939-1952

A Speed-Optimized Systolic Array Processor Architecture for Spatio-Temporal 2-D IIR Broadband Beam Filters Arjuna Madanayake, H.L.P.; Bruton, L.T. Page(s): 1953-1966

A Low-Cost Serial Decoder Architecture for Low-Density Parity-Check Convolutional Codes
Bates, S.; Zhengang Chen; Gunthorpe, L.; Pusane, A.E.; Zigangirov, K.Sh.; Costello, D.J. Page(s): 1967-1976

Design of Multistage Decimation Filters Using Cyclotomic Polynomials: Optimization and Design Issues
Laddomada, M. Page(s): 1977-1987

A Novel Technique for the Identification of ARMA Systems Under Very Low Levels of SNR
Fattah, S.A.; Zhu, W.-P.; Ahmad, M.O. Page(s): 1988-2001

Frequency-Response Masking-Based Design of Nearly Perfect-Reconstruction Two-Channel FIR Filterbanks With Rational Sampling Factors Bregovic, R.; Yong Ching Lim; Saramaki, T. Page(s): 2002-2012

Statistics of 2-D DT-CWT Coefficients for a Gaussian Distributed Signal
Rahman, S.; Ahmad, M.O.; Swamy, M. Page(s): 2013-2025

Analog-to-Digital Conversion Using Noise Shaping and Time Encoding
Hernandez, L.; Prefasi, E. Page(s): 2026-2037

General Dynamics of Pulsed Digital Oscillators
Dominguez, M.; Pons-Nin, J.; Ricart, J. Page(s): 2038-2050

Fractional-Order Sinusoidal Oscillators: Design Procedure and Practical Examples
Radwan, A.G.; Elwakil, A.S.; Soliman, A.M. Page(s): 2051-2063

Statistical Analysis of On-Chip Power Delivery Networks Considering Lognormal Leakage Current Variations With Spatial Correlation Ning Mi; Fan, J.; Tan, S.X-D.; Yici Cai; Xianlong Hong Page(s): 2064-2075

A Systematic Design Flow for Optimal Capacitance Assignment in Switched-Capacitor Biquads
Hua Tang Page(s): 2076-2086

Delay-Dependent ${H}_{infty}$ Filtering of Piecewise-Linear Systems With Time-Varying Delays
Meng Chen; Gang Feng Page(s): 2087-2096

Rate-Dependent Mixed ${cal H}^{2}/{cal H}^{infty}$ Filter Design for Parameter-DependentState Delayed LPV Systems Velni, J.M.; Grigoriadis, K.M. Page(s): 2097-2105

Multiband 0.25-$mu{hbox {m}}$ CMOS Base Station Chips for Indirect and Direct Conversion Receivers
Boric-Lubecke, O.; Jenshan Lin; Verma, A.; Lo, I.; Lubecke, V.M. Page(s): 2106-2115

Reducing Lookup-Table Size in Direct Digital Frequency Synthesizers Using Optimized Multipartite Table Method De Caro, D.; Petra, N.; Strollo, A. Page(s): 2116-2127

A Generalized Study of Multiphase Parallel Resonant Inverters for High-Power Applications
Branas, C.; Azcondo, F. J.; Casanueva, R. Page(s): 2128-2138

High Conversion Ratio DC–DC Converters With Reduced Switch Stress
Ismail, E.H.; Al-Saffar, M.A.; Sabzali, A.J. Page(s): 2139-2151

Authors' Reply to “Comments on Bandpass Sigma-Delta Modulator Employing SAW Resonator as Loop Filter” Rui Yu; Yong Ping Xu Page(s): 2152-2152

Access over 1 million articles-the IEEE Digital Library Page(s): 2153-2153

Why we joined ... Page(s): 2154-2154

Leading the field since 1884 Page(s): 2155-2155

IEEE Transactions on Circuits and Systems—I: Regular Papers information for authors
Page(s): 2156-2156

IEEE Circuits and Systems Society Information  Page(s): C3-C3